[fns76]

Hi Folks

I see in google that the SH4 support for XMBC is allready started. The Duckbox project start with patches for this architecture.

Here is the link to the reposetory: https://gitorious.org/open-duckbox-proje...mmits/xbmc

Did Anyone know what STB Boxes will be supportes ?

[onizuka]

XBMC for Dreamcast?

[fns76]

[Jönke]

pics are nice but give us a video

[Memphiz]

or post the system info

[sh4_]

system info??
the stills you can see above were taken from kathrein ufs912 based on sti7111 cpu.

machine : STx7111 Mboard (Kathrein UFS-912)
processor : 0
cpu family : sh4
cpu type : STx7111
cut : 3.x
cpu flags : fpu icbi synco fpchg
cache type : split (harvard)
icache size : 32KiB (2-way)
dcache size : 32KiB (2-way)
address sizes : 32 bits physical
bogomips : 448.51

as you can see, it´s still at the beginning. there are problems with alphablending. reflections (see the weather screen).
these are the first steps with opengl on stb called duckboxes ;-)
hopefully the lean confluence light brings us much more performance

[Dharani.R]

I am compiling the XBMC for STX7108 cpu. If there any possibilities to compile the Duckbox project based on STi7108?

[fns76]

The Ducktale Thread about compiling and supported devices you can find here: xbmc-meets-sh4

[Solo0815]

If its released, will it run on a Vu+ DUO?

Code:

root@bm750:~# cat /proc/cpuinfo
system type             : BCM7335B0 STB platform
processor               : 0
cpu model               : Brcm4380 V4.4  FPU V0.1
BogoMIPS                : 403.45
cpu MHz                 : 404.995
wait instruction        : yes
microsecond timers      : yes
tlb_entries             : 32
extra interrupt vector  : yes
hardware watchpoint     : no
ASEs implemented        : mips16
shadow register sets    : 1
kscratch registers      : 0
core                    : 0
VCED exceptions         : not available
VCEI exceptions         : not available

processor               : 1
cpu model               : Brcm4380 V4.4  FPU V0.1
BogoMIPS                : 403.45
cpu MHz                 : 404.995
wait instruction        : yes
microsecond timers      : yes
tlb_entries             : 32
extra interrupt vector  : yes
hardware watchpoint     : no
ASEs implemented        : mips16
shadow register sets    : 1
kscratch registers      : 0
core                    : 0
VCED exceptions         : not available
VCEI exceptions         : not available

[fns76]

It is released, but this is the SH4 Thread, the MIPS Thead you can find here:

http://forum.xbmc.org/showthread.php?tid=132736

SH4 STBs for now is the Kathrein 913 (in flash) and atevio7500 (via USB)